ModelSim has long been the most thrustworthy simulator for FPGA designs. It offers vendor independency and greate performance even with larger designs compared to the budget solutions offered by HW vendors.

The true mixed mode simulation VHDL/Verilog can be performed with PLUS version, allowing the usage of IP blocks written in either one.

  • Support for SWIFT-models available
  • Single kernel technology
  • VHDL,Verilog,PSL and SystemVerilog designs
  • Assertions support for testing
  • Easy GUI with Tcl
  • Integrated project management, source codeintegroitu projektin hallinta, lähdekoodimallineet ja velhot
  • Code Coverage as standard
  • Xilinx SecureIP support
  • SystemC-option available etc.

See the Mentor’s ModelSim page with more information, trials and downloads.

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